AEIC-7273-S16 quad diff erential line driver lc with open-collector outputs and enable function data sheet description these line drivers are similar in function to the aeic- 7272-s16, only in an open-collector format. the vcc pin powers the internal logic only. output voltage is dependent on the customer supplied voltage, up to a maximum of 30 v. there is essentially no diff erence in output swing or performance with vcc (logic) values from 3.5-30 v. internal clamp diodes allow trouble-free operation when driving cable lengths exceeding 100 meters. the outputs are protected by initiating shutdown when junction temperatures exceed safe limits. this feature assures highly reliable operation in harsh envi- ronments. heat sinking is aided by having pin 8 directly connected to the asic substrate inside the package. this part is available in 16l soic pb-free) package. applications ?? encoders ?? industrial controls features ?? supply (bias) voltage range 3.5 v to 30 v ?? operation to 800khz ?? cmos and ttl compatible inputs ?? support rs422a ?? high impedance buff ered inputs with hysteresis ?? npn open-collector outputs ?? 80 ma peak sink/source current ?? outputs protected by thermal shut-down pin assignment d in a in a+ a- v cc d- d+ nc c- b- b+ b in gnd c in c+ en- v reg 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
2 table 1. absolute maximum ratings parameters symbol min. max. units notes operating temperature range t a -55 125 c supply (driver) voltage range v ccd 3.5 30 v table 2. electrical characteristics unless otherwise specifi ed, t a = 25 c and en- < 0.8 v. parameters symbol min. typ. max. units test conditions overtemp operate point (junction) t jop C 172 C c note 1 overtemp release point (junction) t jrp C 136 C c note 1 vcc voltage range v cc 3.5 5 30 v supply current v cc1 i cc1 C 11.9 16.0 ma v cc = 5 v supply current v cc2 i cc2 C 2.5 3.4 ma v cc = 5 v, en- > 2 v supply current v cc3 i cc3 C 12.1 18.5 ma v cc = 30 v supply current v cc4 i cc2 C 2.6 3.5 ma v cc = 30 v, en- > 2 v enable input threshold v the 0.8 1.5 2 v enable low level input current i ile -10 0 10 ? a v in = 0 v, v cc = 5 v enable high level input current i ihe C 108 150 ? a v in = 5 v, v cc = 5 v high impedance output leakage i oz -4.0 0.0 4.0 ? a v cc = 5 v, en- > 2 v, output at 15 v input positive-going threshold v t+ 1.05 1.25 1.45 v input negative-going threshold v t- 0.75 0.95 1.15 v input hysteresis v h C 0.3 C v low level input current i il -4.0 -0.1 C ? a v in = 0 v, v cc = 5 v high level input current i ih C 0 4.0 ? a v in = 5 v, v cc = 5 v low level output1 v ol1 C 375 500 mv i ol = 20 ma, v cc = 5 v, v oc = 30 v low level output2 v ol2 C 370 500 mv i ol = 20 ma, v cc = 30 v, v oc = 30 v high level output current1 i oh1 C010 ? a v cc = 5 v, v oc = 30 v high level output current2 i oh2 C010 ? a v cc = 30 v, v oc = 30 v notes : 1. this is not a test parameter, but for information only. 2. unused inputs should be connected to ground. 3. do not leave pin 12 open. in applications which do not use the enable function, this pin should be tied to ground. table 3. ac switching characteristics load is 470 ohms and 1000 pf, output to its compliment and 470 ohms each output to voc. parameters symbol min. typ. max. units test conditions propagation delay, rising input 50% point to zero crossing of diff erential outputs t plh C 232 325 ns see above. propagation delay, falling input 50% point to zero crossing of diff erential outputs t phl C 236 330 ns see above. output rise time t r C 516 722 ns see above. output fall time t f C 516 722 ns see above.
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2011 avago technologies. all rights reserved. av02-3022en - july 8, 2011 package drawings (dimensions in inches) notes: 1. lead coplanarity should be o to 0.004" max. 2. package surface fi nishing: vd1 24~27 (dual). package surface fi nishing: vd1 13~15 (16l soic(nb) matrix). 3. all dimension excluding mold fl ashes. 4. the lead width, b to be determined at 0.0075" from the lead tip. symbol 16 soic min max a 0.054 0.068 a1 0.004 0.0098 b 0.014 0.019 d 0.386 0.393 e 0.150 0.157 h 0.229 0.244 e 0.050 bsc c 0.0075 0.0098 l 0.016 0.034 x 0.020 ref 1 0 8 2 7 bsc d x e b e pin no. 1 id mark c l c l a a1 0.010 seating plane l detail a ? 2 gauge plane ? 1 0.004 detail a c h 0.015 x 45
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